EDN

Implementing and Converting Logic Circuits Using Only NAND or NOR Gates

This is going to be a column that’s divided into three sections. It’s based on a question that a student posed in the EEWeb forums, and he also sent it directly to yours truly. The core of this ...
Embedded

Using multi-bit flip-flop custom cells to achieve better SoC design efficiency

System-on-chip (SoC) designs are becoming more and more complex, by whatever means you measure it: power domains, gate count, packing densities, heat dissipation capacities, etc. At such high packing ...
EDN

How to Read Data Sheets: Logic Timing (Part 3, Flip-Flops)

The JK flip-flop augments the behavior of the SR flip-flop (J = Set, K = Reset) by interpreting the J = K = 1 condition as a “flip” or toggle command. In my previous column, we introduced latches and ...
Design-Reuse

Configurable Asynchronous Set/Reset Flip-Flop for Post-Silicon ECOs

Over the recent years post-silicon SoC validation has become a major bottleneck in IC design. Due restricted design cycle time and test bench limitations almost all the designs are taped-out with ...
Hackaday

The One-Transistor Flip-Flop

A flip-flop is one of the most basic digital electronic circuits. It can most easily be built from just two transistors, although they can and have been built out of vacuum tubes, NAND and NOR gates, ...